[rt2x00-users] [PATCH 08/12] rt2x00: Introduce some #define for MCS index

Ivo van Doorn ivdoorn at gmail.com
Sun Aug 16 12:34:27 UTC 2009


On Saturday 15 August 2009, Benoit PAPILLAULT wrote:
> Use #define for all MCS values. Fixed a typo when initializing fallback rate
> table on rt2800pci for LG_FBK_CFG0_OFDMMCS2FBK (was 3, should be 9 according
> to Ralink source code).
> 

I can't see an obvious reason for making them all defines, especially
since the MCS rates map 1:1 to the actual value. Perhaps it will be needed
later, but for now I'll keep this out.

Ivo

> Signed-off-by: Benoit PAPILLAULT <benoit.papillault at free.fr>
> ---
>  drivers/net/wireless/rt2x00/rt2800pci.c |   56 +++++++++++++++---------------
>  drivers/net/wireless/rt2x00/rt2x00dev.c |   24 +++++++-------
>  drivers/net/wireless/rt2x00/rt2x00ht.c  |    2 +-
>  drivers/net/wireless/rt2x00/rt2x00reg.h |   54 +++++++++++++++++++++++++++++
>  4 files changed, 95 insertions(+), 41 deletions(-)
> 
> diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
> index 97eb228..f2fd2fb 100644
> --- a/drivers/net/wireless/rt2x00/rt2800pci.c
> +++ b/drivers/net/wireless/rt2x00/rt2800pci.c
> @@ -1596,43 +1596,43 @@ static int rt2800pci_init_registers(struct rt2x00_dev *rt2x00dev)
>  	rt2x00pci_register_write(rt2x00dev, HW_BEACON_BASE7, 0);
>  
>  	rt2x00pci_register_read(rt2x00dev, HT_FBK_CFG0, &reg);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS0FBK, 0);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS1FBK, 0);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS2FBK, 1);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS3FBK, 2);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS4FBK, 3);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS5FBK, 4);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS6FBK, 5);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS7FBK, 6);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS0FBK, MCS_0);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS1FBK, MCS_0);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS2FBK, MCS_1);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS3FBK, MCS_2);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS4FBK, MCS_3);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS5FBK, MCS_4);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS6FBK, MCS_5);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS7FBK, MCS_6);
>  	rt2x00pci_register_write(rt2x00dev, HT_FBK_CFG0, reg);
>  
>  	rt2x00pci_register_read(rt2x00dev, HT_FBK_CFG1, &reg);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS8FBK, 8);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS9FBK, 8);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS10FBK, 9);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS11FBK, 10);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS12FBK, 11);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS13FBK, 12);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS14FBK, 13);
> -	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS15FBK, 14);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS8FBK, MCS_8);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS9FBK, MCS_8);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS10FBK, MCS_9);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS11FBK, MCS_10);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS12FBK, MCS_11);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS13FBK, MCS_12);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS14FBK, MCS_13);
> +	rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS15FBK, MCS_14);
>  	rt2x00pci_register_write(rt2x00dev, HT_FBK_CFG1, reg);
>  
>  	rt2x00pci_register_read(rt2x00dev, LG_FBK_CFG0, &reg);
> -	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS0FBK, 8);
> -	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS1FBK, 8);
> -	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS2FBK, 3);
> -	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS3FBK, 10);
> -	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS4FBK, 11);
> -	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS5FBK, 12);
> -	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS6FBK, 13);
> -	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS7FBK, 14);
> +	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS0FBK, MCS_RATE_6 | MCS_OFDM_FLAG);
> +	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS1FBK, MCS_RATE_6 | MCS_OFDM_FLAG);
> +	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS2FBK, MCS_RATE_9 | MCS_OFDM_FLAG);
> +	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS3FBK, MCS_RATE_12 | MCS_OFDM_FLAG);
> +	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS4FBK, MCS_RATE_18 | MCS_OFDM_FLAG);
> +	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS5FBK, MCS_RATE_24 | MCS_OFDM_FLAG);
> +	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS6FBK, MCS_RATE_36 | MCS_OFDM_FLAG);
> +	rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS7FBK, MCS_RATE_48 | MCS_OFDM_FLAG);
>  	rt2x00pci_register_write(rt2x00dev, LG_FBK_CFG0, reg);
>  
>  	rt2x00pci_register_read(rt2x00dev, LG_FBK_CFG1, &reg);
> -	rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS0FBK, 0);
> -	rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS1FBK, 0);
> -	rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS2FBK, 1);
> -	rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS3FBK, 2);
> +	rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS0FBK, MCS_RATE_1);
> +	rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS1FBK, MCS_RATE_1);
> +	rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS2FBK, MCS_RATE_2);
> +	rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS3FBK, MCS_RATE_5_5);
>  	rt2x00pci_register_write(rt2x00dev, LG_FBK_CFG1, reg);
>  
>  	/*
> diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
> index d8192b1..e4f4f1b 100644
> --- a/drivers/net/wireless/rt2x00/rt2x00dev.c
> +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
> @@ -474,84 +474,84 @@ const struct rt2x00_rate rt2x00_supported_rates[12] = {
>  		.bitrate = 10,
>  		.ratemask = BIT(0),
>  		.plcp = 0x00,
> -		.mcs = RATE_MCS(RATE_MODE_CCK, 0),
> +		.mcs = RATE_MCS(RATE_MODE_CCK, MCS_RATE_1),
>  	},
>  	{
>  		.flags = DEV_RATE_CCK | DEV_RATE_SHORT_PREAMBLE,
>  		.bitrate = 20,
>  		.ratemask = BIT(1),
>  		.plcp = 0x01,
> -		.mcs = RATE_MCS(RATE_MODE_CCK, 1),
> +		.mcs = RATE_MCS(RATE_MODE_CCK, MCS_RATE_2),
>  	},
>  	{
>  		.flags = DEV_RATE_CCK | DEV_RATE_SHORT_PREAMBLE,
>  		.bitrate = 55,
>  		.ratemask = BIT(2),
>  		.plcp = 0x02,
> -		.mcs = RATE_MCS(RATE_MODE_CCK, 2),
> +		.mcs = RATE_MCS(RATE_MODE_CCK, MCS_RATE_5_5),
>  	},
>  	{
>  		.flags = DEV_RATE_CCK | DEV_RATE_SHORT_PREAMBLE,
>  		.bitrate = 110,
>  		.ratemask = BIT(3),
>  		.plcp = 0x03,
> -		.mcs = RATE_MCS(RATE_MODE_CCK, 3),
> +		.mcs = RATE_MCS(RATE_MODE_CCK, MCS_RATE_11),
>  	},
>  	{
>  		.flags = DEV_RATE_OFDM,
>  		.bitrate = 60,
>  		.ratemask = BIT(4),
>  		.plcp = 0x0b,
> -		.mcs = RATE_MCS(RATE_MODE_OFDM, 0),
> +		.mcs = RATE_MCS(RATE_MODE_OFDM, MCS_RATE_6),
>  	},
>  	{
>  		.flags = DEV_RATE_OFDM,
>  		.bitrate = 90,
>  		.ratemask = BIT(5),
>  		.plcp = 0x0f,
> -		.mcs = RATE_MCS(RATE_MODE_OFDM, 1),
> +		.mcs = RATE_MCS(RATE_MODE_OFDM, MCS_RATE_9),
>  	},
>  	{
>  		.flags = DEV_RATE_OFDM,
>  		.bitrate = 120,
>  		.ratemask = BIT(6),
>  		.plcp = 0x0a,
> -		.mcs = RATE_MCS(RATE_MODE_OFDM, 2),
> +		.mcs = RATE_MCS(RATE_MODE_OFDM, MCS_RATE_12),
>  	},
>  	{
>  		.flags = DEV_RATE_OFDM,
>  		.bitrate = 180,
>  		.ratemask = BIT(7),
>  		.plcp = 0x0e,
> -		.mcs = RATE_MCS(RATE_MODE_OFDM, 3),
> +		.mcs = RATE_MCS(RATE_MODE_OFDM, MCS_RATE_18),
>  	},
>  	{
>  		.flags = DEV_RATE_OFDM,
>  		.bitrate = 240,
>  		.ratemask = BIT(8),
>  		.plcp = 0x09,
> -		.mcs = RATE_MCS(RATE_MODE_OFDM, 4),
> +		.mcs = RATE_MCS(RATE_MODE_OFDM, MCS_RATE_24),
>  	},
>  	{
>  		.flags = DEV_RATE_OFDM,
>  		.bitrate = 360,
>  		.ratemask = BIT(9),
>  		.plcp = 0x0d,
> -		.mcs = RATE_MCS(RATE_MODE_OFDM, 5),
> +		.mcs = RATE_MCS(RATE_MODE_OFDM, MCS_RATE_36),
>  	},
>  	{
>  		.flags = DEV_RATE_OFDM,
>  		.bitrate = 480,
>  		.ratemask = BIT(10),
>  		.plcp = 0x08,
> -		.mcs = RATE_MCS(RATE_MODE_OFDM, 6),
> +		.mcs = RATE_MCS(RATE_MODE_OFDM, MCS_RATE_48),
>  	},
>  	{
>  		.flags = DEV_RATE_OFDM,
>  		.bitrate = 540,
>  		.ratemask = BIT(11),
>  		.plcp = 0x0c,
> -		.mcs = RATE_MCS(RATE_MODE_OFDM, 7),
> +		.mcs = RATE_MCS(RATE_MODE_OFDM, MCS_RATE_54),
>  	},
>  };
>  
> diff --git a/drivers/net/wireless/rt2x00/rt2x00ht.c b/drivers/net/wireless/rt2x00/rt2x00ht.c
> index e3cec83..22f1a41 100644
> --- a/drivers/net/wireless/rt2x00/rt2x00ht.c
> +++ b/drivers/net/wireless/rt2x00/rt2x00ht.c
> @@ -47,7 +47,7 @@ void rt2x00ht_create_tx_descriptor(struct queue_entry *entry,
>  
>  	txdesc->mcs = rt2x00_get_rate_mcs(hwrate->mcs);
>  	if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
> -		txdesc->mcs |= 0x08;
> +		txdesc->mcs |= 0x08;	/* FIXME : it should be MCS_SHORTP_FLAG = 0x4 */
>  
>  	/*
>  	 * Convert flags
> diff --git a/drivers/net/wireless/rt2x00/rt2x00reg.h b/drivers/net/wireless/rt2x00/rt2x00reg.h
> index 861322d..8a0503d 100644
> --- a/drivers/net/wireless/rt2x00/rt2x00reg.h
> +++ b/drivers/net/wireless/rt2x00/rt2x00reg.h
> @@ -135,6 +135,60 @@ enum rate_modulation {
>  };
>  
>  /*
> + * MCS value for CCK modulations
> + */
> +
> +#define MCS_RATE_1	0	// long preamble CCK 1Mbps
> +#define MCS_RATE_2	1	// long preamble CCK 1Mbps
> +#define MCS_RATE_5_5	2
> +#define MCS_RATE_11	3
> +#define MCS_SHORTP_FLAG	0x4	// switch to short preamble instead of long
> +
> +/*
> + * MCS value for OFDM modulations
> + */
> +
> +#define MCS_RATE_6	0
> +#define MCS_RATE_9	1
> +#define MCS_RATE_12	2
> +#define MCS_RATE_18	3
> +#define MCS_RATE_24	4
> +#define MCS_RATE_36	5
> +#define MCS_RATE_48	6
> +#define MCS_RATE_54	7
> +#define	MCS_OFDM_FLAG	0x8
> +
> +/*
> + * MCS value for HT modulation (HT_MIX or HT_GREENFIELD)
> + */
> +
> +#define MCS_0	0
> +#define MCS_1	1
> +#define MCS_2	2
> +#define MCS_3	3
> +#define MCS_4	4
> +#define MCS_5	5
> +#define MCS_6	6
> +#define MCS_7	7
> +#define MCS_8	8
> +#define MCS_9	9
> +#define MCS_10	10
> +#define MCS_11	11
> +#define MCS_12	12
> +#define MCS_13	13
> +#define MCS_14	14
> +#define MCS_15	15
> +#define MCS_16	16
> +#define MCS_17	17
> +#define MCS_18	18
> +#define MCS_19	19
> +#define MCS_20	20
> +#define MCS_21	21
> +#define MCS_22	22
> +#define MCS_23	23
> +#define MCS_32	32
> +
> +/*
>   * Firmware validation error codes
>   */
>  enum firmware_errors {





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