[rt2x00-users] [RFC 1/9] rt2x00: use an irqmask to simplify irq toggling

Helmut Schaa helmut.schaa at googlemail.com
Tue Jul 6 02:19:53 AEST 2010


Use an irqmask to simplify irq toggling. Will be used in a subsequent patch.

Signed-off-by: Helmut Schaa <helmut.schaa at googlemail.com>
---
 drivers/net/wireless/rt2x00/rt2400pci.c |   22 +++++++++---
 drivers/net/wireless/rt2x00/rt2500pci.c |   22 +++++++++---
 drivers/net/wireless/rt2x00/rt2800pci.c |   53 ++++++++++++++++++++-----------
 drivers/net/wireless/rt2x00/rt2x00.h    |    5 +++
 drivers/net/wireless/rt2x00/rt61pci.c   |   41 +++++++++++++++++-------
 5 files changed, 100 insertions(+), 43 deletions(-)

diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index 3bedf56..b627fdc 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -877,7 +877,6 @@ static void rt2400pci_toggle_rx(struct rt2x00_dev *rt2x00dev,
 static void rt2400pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
 				 enum dev_state state)
 {
-	int mask = (state == STATE_RADIO_IRQ_OFF);
 	u32 reg;
 
 	/*
@@ -894,11 +893,10 @@ static void rt2400pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
 	 * Non-checked interrupt bits are disabled by default.
 	 */
 	rt2x00pci_register_read(rt2x00dev, CSR8, &reg);
-	rt2x00_set_field32(&reg, CSR8_TBCN_EXPIRE, mask);
-	rt2x00_set_field32(&reg, CSR8_TXDONE_TXRING, mask);
-	rt2x00_set_field32(&reg, CSR8_TXDONE_ATIMRING, mask);
-	rt2x00_set_field32(&reg, CSR8_TXDONE_PRIORING, mask);
-	rt2x00_set_field32(&reg, CSR8_RXDONE, mask);
+	if (state == STATE_RADIO_IRQ_OFF)
+		reg |= rt2x00dev->irqmask[0];
+	else
+		reg &= ~rt2x00dev->irqmask[0];
 	rt2x00pci_register_write(rt2x00dev, CSR8, reg);
 }
 
@@ -1474,6 +1472,7 @@ static int rt2400pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
 static int rt2400pci_probe_hw(struct rt2x00_dev *rt2x00dev)
 {
 	int retval;
+	u32 reg;
 
 	/*
 	 * Allocate eeprom data.
@@ -1504,6 +1503,17 @@ static int rt2400pci_probe_hw(struct rt2x00_dev *rt2x00dev)
 	 */
 	rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
 
+	/*
+	 * Create irq mask
+	 */
+	reg = 0;
+	rt2x00_set_field32(&reg, CSR8_TBCN_EXPIRE, 1);
+	rt2x00_set_field32(&reg, CSR8_TXDONE_TXRING, 1);
+	rt2x00_set_field32(&reg, CSR8_TXDONE_ATIMRING, 1);
+	rt2x00_set_field32(&reg, CSR8_TXDONE_PRIORING, 1);
+	rt2x00_set_field32(&reg, CSR8_RXDONE, 1);
+	rt2x00dev->irqmask[0] = reg;
+
 	return 0;
 }
 
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c
index 69d231d..7e47f1a 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.c
+++ b/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -1035,7 +1035,6 @@ static void rt2500pci_toggle_rx(struct rt2x00_dev *rt2x00dev,
 static void rt2500pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
 				 enum dev_state state)
 {
-	int mask = (state == STATE_RADIO_IRQ_OFF);
 	u32 reg;
 
 	/*
@@ -1052,11 +1051,10 @@ static void rt2500pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
 	 * Non-checked interrupt bits are disabled by default.
 	 */
 	rt2x00pci_register_read(rt2x00dev, CSR8, &reg);
-	rt2x00_set_field32(&reg, CSR8_TBCN_EXPIRE, mask);
-	rt2x00_set_field32(&reg, CSR8_TXDONE_TXRING, mask);
-	rt2x00_set_field32(&reg, CSR8_TXDONE_ATIMRING, mask);
-	rt2x00_set_field32(&reg, CSR8_TXDONE_PRIORING, mask);
-	rt2x00_set_field32(&reg, CSR8_RXDONE, mask);
+	if (state == STATE_RADIO_IRQ_OFF)
+		reg |= rt2x00dev->irqmask[0];
+	else
+		reg &= ~rt2x00dev->irqmask[0];
 	rt2x00pci_register_write(rt2x00dev, CSR8, reg);
 }
 
@@ -1797,6 +1795,7 @@ static int rt2500pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
 static int rt2500pci_probe_hw(struct rt2x00_dev *rt2x00dev)
 {
 	int retval;
+	u32 reg;
 
 	/*
 	 * Allocate eeprom data.
@@ -1827,6 +1826,17 @@ static int rt2500pci_probe_hw(struct rt2x00_dev *rt2x00dev)
 	 */
 	rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
 
+	/*
+	 * Create interrupt mask
+	 */
+	reg = 0;
+	rt2x00_set_field32(&reg, CSR8_TBCN_EXPIRE, 1);
+	rt2x00_set_field32(&reg, CSR8_TXDONE_TXRING, 1);
+	rt2x00_set_field32(&reg, CSR8_TXDONE_ATIMRING, 1);
+	rt2x00_set_field32(&reg, CSR8_TXDONE_PRIORING, 1);
+	rt2x00_set_field32(&reg, CSR8_RXDONE, 1);
+	rt2x00dev->irqmask[0] = reg;
+
 	return 0;
 }
 
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index 6f11760..b38e760 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -422,7 +422,6 @@ static void rt2800pci_toggle_rx(struct rt2x00_dev *rt2x00dev,
 static void rt2800pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
 				 enum dev_state state)
 {
-	int mask = (state == STATE_RADIO_IRQ_ON);
 	u32 reg;
 
 	/*
@@ -434,25 +433,15 @@ static void rt2800pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
 		rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
 	}
 
+	/*
+	 * Only toggle the interrupts bits we are going to use.
+	 * Non-checked interrupt bits are disabled by default.
+	 */
 	rt2800_register_read(rt2x00dev, INT_MASK_CSR, &reg);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_RXDELAYINT, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_TXDELAYINT, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_RX_DONE, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_AC0_DMA_DONE, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_AC1_DMA_DONE, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_AC2_DMA_DONE, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_AC3_DMA_DONE, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_HCCA_DMA_DONE, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_MGMT_DMA_DONE, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_MCU_COMMAND, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_RXTX_COHERENT, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_TBTT, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_PRE_TBTT, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_TX_FIFO_STATUS, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_AUTO_WAKEUP, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_GPTIMER, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_RX_COHERENT, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_TX_COHERENT, mask);
+	if (state == STATE_RADIO_IRQ_ON)
+		reg |= rt2x00dev->irqmask[0];
+	else
+		reg &= ~rt2x00dev->irqmask[0];
 	rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg);
 }
 
@@ -1000,6 +989,7 @@ static const struct rt2800_ops rt2800pci_rt2800_ops = {
 static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev)
 {
 	int retval;
+	u32 reg;
 
 	rt2x00dev->priv = (void *)&rt2800pci_rt2800_ops;
 
@@ -1043,6 +1033,31 @@ static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev)
 	 */
 	rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
 
+	/*
+	 * Create irq mask
+	 */
+	reg = 0;
+	rt2x00_set_field32(&reg, INT_MASK_CSR_RXDELAYINT, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_TXDELAYINT, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_RX_DONE, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_AC0_DMA_DONE, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_AC1_DMA_DONE, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_AC2_DMA_DONE, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_AC3_DMA_DONE, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_HCCA_DMA_DONE, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_MGMT_DMA_DONE, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_MCU_COMMAND, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_RXTX_COHERENT, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_TBTT, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_PRE_TBTT, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_TX_FIFO_STATUS, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_AUTO_WAKEUP, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_GPTIMER, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_RX_COHERENT, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_TX_COHERENT, 1);
+	rt2x00dev->irqmask[0] = reg;
+
+
 	return 0;
 }
 
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index 788b0e4..19ea0a9 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -863,6 +863,11 @@ struct rt2x00_dev {
 	const struct firmware *fw;
 
 	/*
+	 * Interrupt mask.
+	 */
+	u32 irqmask[2];
+
+	/*
 	 * Driver specific data.
 	 */
 	void *priv;
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index 0123fbc..5f51fcc 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -1622,7 +1622,6 @@ static void rt61pci_toggle_rx(struct rt2x00_dev *rt2x00dev,
 static void rt61pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
 			       enum dev_state state)
 {
-	int mask = (state == STATE_RADIO_IRQ_OFF);
 	u32 reg;
 
 	/*
@@ -1642,21 +1641,18 @@ static void rt61pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
 	 * Non-checked interrupt bits are disabled by default.
 	 */
 	rt2x00pci_register_read(rt2x00dev, INT_MASK_CSR, &reg);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_TXDONE, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_RXDONE, mask);
-	rt2x00_set_field32(&reg, INT_MASK_CSR_ENABLE_MITIGATION, mask);
+	if (state == STATE_RADIO_IRQ_OFF)
+		reg |= rt2x00dev->irqmask[0];
+	else
+		reg &= ~rt2x00dev->irqmask[0];
 	rt2x00_set_field32(&reg, INT_MASK_CSR_MITIGATION_PERIOD, 0xff);
 	rt2x00pci_register_write(rt2x00dev, INT_MASK_CSR, reg);
 
 	rt2x00pci_register_read(rt2x00dev, MCU_INT_MASK_CSR, &reg);
-	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_0, mask);
-	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_1, mask);
-	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_2, mask);
-	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_3, mask);
-	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_4, mask);
-	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_5, mask);
-	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_6, mask);
-	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_7, mask);
+	if (state == STATE_RADIO_IRQ_OFF)
+		reg |= rt2x00dev->irqmask[1];
+	else
+		reg &= ~rt2x00dev->irqmask[1];
 	rt2x00pci_register_write(rt2x00dev, MCU_INT_MASK_CSR, reg);
 }
 
@@ -2653,6 +2649,7 @@ static int rt61pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
 static int rt61pci_probe_hw(struct rt2x00_dev *rt2x00dev)
 {
 	int retval;
+	u32 reg;
 
 	/*
 	 * Disable power saving.
@@ -2696,6 +2693,26 @@ static int rt61pci_probe_hw(struct rt2x00_dev *rt2x00dev)
 	 */
 	rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
 
+	/*
+	 * Create interrupt masks
+	 */
+	reg = 0;
+	rt2x00_set_field32(&reg, INT_MASK_CSR_TXDONE, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_RXDONE, 1);
+	rt2x00_set_field32(&reg, INT_MASK_CSR_ENABLE_MITIGATION, 1);
+	rt2x00dev->irqmask[0] = reg;
+
+	reg = 0;
+	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_0, 1);
+	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_1, 1);
+	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_2, 1);
+	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_3, 1);
+	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_4, 1);
+	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_5, 1);
+	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_6, 1);
+	rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_7, 1);
+	rt2x00dev->irqmask[1] = reg;
+
 	return 0;
 }
 
-- 
1.6.4.2





More information about the users mailing list